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Well, there are a couple approaches to this. One is to use multiple DRAM banks and interleave words among the banks. This would consume more power than a single-bank approach, but you could then refresh one bank while accessing the other (most SDRAM puts multiple banks on a single chip for exactly this reason, but I think most 72-pin SIMMs are multi-bank also). Another is to try to do "hidden refresh" which basically amounts to sneaking in a refresh cycle after a read. Micron has some good info on the various approaches in their datasheets. Another option would be to detect when Genesis is not accessing the cart area at all (e.g. /AS asserts without cart /CE asserting, which IIRC even happens during VDP DMA) and insert your refreshes then. In that case there might be a problem with idle loops that wait for an interrupt, though, e.g.:
I don't think this type of code would generate any access to a non-cart area and might run for the better part of a frame depending on the circumstances... |