| | | My primary goal was to document the protection scheme, although some sort of ATA interface wouldn't be out of the ball park in the long run. |
Yeah, when I said "document the basics", I meant just enough to figure out how the interface is clocked/controlled, and who talks when if there's fixed turnaround timing. With that info it should be feasible to snoop the interface with cheap dedicated hardware instead of a logic analyzer.  |